Yasar Gurbuz | Melik YAZICI, Ph.D.

Latest

Sub-1-dB and Wideband SiGe BiCMOS Low-Noise Amplifiers for X-Band Applications
Active Positive Sloped Equalizer for X-Band SiGe BiCMOS Phased Array Applications
Ultra-Low Noise Amplifier for X-Band SiGe BiCMOS Phased Array Applications
A Hand-Held Point-of-Care Biosensor Device for Detection of Multiple Cancer and Cardiac Disease Biomarkers Using Interdigitated Capacitive Arrays
A Partially Pixel-Parallel DROIC for MWIR Imagers With Columnwise Residue Quantization
0.13μm SiGe BiCMOS W-Band Low-Noise Amplifier for Passive Imaging Systems
A Wideband (3–13 GHz) 7-Bit SiGe BiCMOS Step Attenuator with Improved Flatness
A low-power CMOS readout IC with on-chip column-parallel SAR ADCs for microbolometer applications
A Novel Approach to Noise Shaping in Digital Pixels for Infrared Imagers using Over-Integration
Development of Hand-Held Point-of-Care Diagnostic Device for Detection of Multiple Cancer and Cardiac Disease Biomarkers
High Dynamic Range Smart Pixel Architecture for Infrared Focal Plane Arrays
A PFM-Based Digital Pixel With an Off-Pixel Residue Measurement for Small Pitch FPAs
A new high dynamic range ROIC with smart light intensity control unit
A low-power CMOS readout IC design for bolometer applications
Dynamic power reduction in digital pixel design for large format focal plane arrays
Digital readout integrated circuit (DROIC) implementing time delay and integration (TDI) for scanning type infrared focal plane arrays (IRFPAs)
A PFM based digital pixel with off-pixel residue measurement for 15μm pitch MWIR FPAs
Design of monocrystalline Si/SiGe multi-quantum well microbolometer detector for infrared imaging systems
Implementation of TDI based digital pixel ROIC with 15μm pixel pitch
US9324745B2
Cryogenic measurements of a digital pixel readout integrated circuit for LWIR
Digital pixel readout integrated circuit architectures for LWIR
Low-power LVDS for digital readout circuits
Implementation of pixel level digital TDI for scanning type LWIR FPAs
WO/2014/082660
A new digital readout integrated circuit (DROIC) with pixel parallel A/D conversion with reduced quantization noise
Implementation of high-dynamic range pixel architecture for SWIR applications
A new digital readout integrated circuit (DROIC) with pixel parallel A/D conversion and reduced quantization noise
A fully digital readout employing extended counting method to achieve very low quantization noise
A new unit cell design with automatic input stage selection capability for increased SNR
Design of 90×8 ROIC with pixel level digital TDI implementation for scanning type LWIR FPAs
Wide Range, Process and Temperature Compensated Voltage Controlled Current Source
Design and realization of 144 x 7 TDI ROIC with hybrid integrated test structure
Design of ROIC based on switched capacitor TDI for MCT LWIR focal plane arrays
Design of a ROIC for scanning type HgCdTe LWIR focal plane arrays